MTech Digital Vlsi Design syllabus for 1 Sem 2018 scheme 18EVE15

Module-1 Module-1 10 hours

MOS Transistor:

The Metal Oxide Semiconductor (MOS) Structure, The MOS System under External Bias, Structure and Operation of MOS Transistor, MOSFET Current-Voltage Characteristics, MOSFET Scaling and Small-Geometry Effects.

 

MOS Inverters-Static Characteristics:

Introduction, Resistive-Load Inverter, Inverters with n_Type MOSFET Load.

Module-2 Module-2 10 hours

MOS Inverters-Static Characteristics:

CMOS Inverter.

 

MOS Inverters:

Switching Characteristics and Interconnect Effects: Introduction, Delay-Time Definition, Calculation of Delay Times, Inverter Design with Delay Constraints, Estimation of Interconnect Parasitics, Calculation of Interconnect Delay, Switching Power Dissipation of CMOS Inverters.

A d v e r t i s e m e n t
Module-3 Module-3 10 hours

Semiconductor Memories:

Introduction, Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Nonvolatile Memory, Flash Memory, Ferroelectric Random Access Memory (FRAM).

Module-4 Module-4 10 hours

Dynamic Logic Circuits:

Introduction, Basic Principles of Pass Transistor Circuits, Voltage Bootstrapping, Synchronous Dynamic Circuit Techniques, Dynamic CMOS Circuit Techniques,High Performance Dynamic CMOS circuits.

 

BiCMOS Logic Circuits:

Introduction, Bipolar Junction Transistor (BJT): Structure and Operation, Dynamic Behavior of BJTs, Basic BiCMOS Circuits: Static Behavior, Switching Delay in BiCMOS Logic Circuits, BiCMOS Applications.

Module-5 Module-5 10 hours

Chip Input and Output (I/O) Circuits:

Introduction, ESD Protection, Input Circuits, Output Circuits and L(di/dt) Noise, OnChip Clock Generation and Distribution, Latch-Up and Its Prevention.

 

Design for Manufacturability:

Introduction, Process Variations, Basic Concepts and Definitions, Design of Experiments and Performance Modeling.