An Introduction to Processor Design:
Processor architecture and organization. Abstraction in hardware design. A simple processor. Instruction set design. Processor design trade-offs. The Reduced Instruction Set Computer. Design for low power consumption. The ARM Architecture: The Acorn RISC Machine. Architectural inheritance. The ARM programmer's model. ARM development tools.
ARM Assembly Language Programming:
Data processing instructions. Data transfer instructions. Control flow instructions. Writing simple assembly language programs. ARM Organization and Implementation: 3-stage pipeline ARM organization. 5-stage pipeline ARM organization. ARM instruction execution. ARM implementation. The ARM coprocessor interface.
The ARM Instruction Set:
Introduction. Exceptions. Conditional execution. Branch and Branch with Link (B, BL) Branch, Branch with Link and exchange instructions (BX, BLX). Software Interrupt (SWI). Data processing instructions. Multiply instructions. Count leading zeros (CLZ - architecture v5T only). Single word and unsigned byte data transfer instructions. Half-word and signed byte data transfer instructions. Multiple register transfer instructions. Swap memory and register instructions (SWP). Status register to general register transfer instructions. General register to status register transfer instructions. Coprocessor instructions. Coprocessor data operations. Coprocessor data transfers. Coprocessor register transfers. Breakpoint instruction (BRK - architecture v5T only). Unused instruction space. Memory faults. ARM architecture variants. Architectural Support for High-Level Languages: Abstraction in software design. Data types. Floating-point data types. The ARM floating-point architecture. Expressions. Conditional statements. Loops. Functions and procedures. Use of memory. Run-time environment.
The Thumb Instruction Set:
The Thumb bit in the CPSR. The Thumb programmer's model. Thumb branch instructions. Thumb software interrupts instruction. Thumb data processing instructions. Thumb single register data transfer instructions. Thumb multiple register data transfer instructions. Thumb breakpoint instruction. Thumb implementation. Thumb applications. Architectural Support for System Development: The ARM memory interface. The Advanced Microcontroller Bus Architecture (AMBA). The ARM reference peripheral specification. Hardware system prototyping tools. The JTAG boundary scan test architecture. The ARM debug architecture. Embedded Trace. Signal processing support.
ARM Processor Cores:
ARM7TDMI. ARM8. ARM9TDMI.ARM10TDMI Memory Hierarchy: Memory size and speed. On-chip memory. Memory management. Architectural Support for Operating Systems. An introduction to operating systems. The ARM system control coprocessor. CP15 protection unit registers. ARM protection unit. CP15 MMU registers. ARM MMU architecture. Synchronization. Context switching. Input / Output.
Course outcomes:
At the end of the course the student will be able to:
Question paper pattern:
The SEE question paper will be set for 100 marks and the marks scored will be proportionately reduced to 60.
Textbook/ Textbooks
1 ARM System on Chip Architecture Steve Furber Pearson. 2nd Edition 2013
Reference Books
1 The definitive guide to ARM Cortex M3 M4 processors Joseph Yiu :, Elsevier Newnes 3rd edition 2014