Basic MOS technology: Integrated circuit’s era. Enhancement and depletion mode MOS transistors. nMOS fabrication. CMOS fabrication. Thermal aspects of processing. BiCMOS technology. Production of E-beam masks. 4 Hours MOS Transistor Theory: Introduction, MOS Device Design Equations, The Complementary CMOS Inverter – DC Characteristics, Static Load MOS Inverters, The Differential Inverter, The Transmission Gate, Tristate Inverter. 4 Hours
Circuit design processes: MOS layers. Stick diagrams. Design rules and layout – lambda-based design and other rules. Examples. Layout diagrams. Symbolic diagrams. Tutorial exercises. 4 Hours Basic Physical Design of Simple logic gates. 3 Hours
CMOS Complementary Logic, Bi CMOS Logic, Pseudo-nMOS Logic, Dynamic CMOS Logic, Clocked CMOS Logic, Pass Transistor Logic, CMOS Domino Logic Cascaded Voltage Switch Logic (CVSL).
Basic circuit concepts: Sheet resistance. Area capacitances. Capacitance calculations. The delay unit. Inverter delays. Driving capacitive loads. Propagation delays. Wiring capacitances. 4 Hours Scaling of MOS circuits: Scaling models and factors. Limits on scaling. Limits due to current density and noise. 3 Hours
CMOS subsystem design: Architectural issues. Switch logic. Gate logic. Design examples – combinational logic. Clocked circuits. Other system considerations. 4 Hours Clocking Strategies 4 Hours
General considerations. Process illustration. ALU subsystem. Adders. Multipliers.
Timing considerations. Memory elements. Memory cell arrays.
Performance parameters. Layout issues. I/O pads. Real estate. System delays. Ground rules for design. Test and testability.