06EC74 DSP ALGORITHMS and ARCHITECTURE syllabus for EC


Part A
Unit-1 Introduction to Digital Signal Processing 5 hours

Introduction, A Digital Signal-Processing System, The Sampling Process, Discrete Time Sequences, Discrete Fourier Transform (DFT) and Fast Fourier Transform (FFT), Linear Time-Invariant Systems, Digital Filters, Decimation and Interpolation.

Unit-2 Architectures for Programmable Digital Signal-Processors 8 hours

Introduction, Basic Architectural Features, DSP Computational Building Blocks, Bus Architecture and Memory, Data Addressing Capabilities, Address Generation Unit, Programmability and Program Execution, Features for External Interfacing.

Unit-3 Programmable Digital Signal Processors 6 hours

Introduction, Commercial Digital Signal-processing Devices, Data Addressing Modes of TMS32OC54xx., Memory Space of TMS32OC54xx Processors, Program Control.

Unit-4 Detail Study of TMS320C54X & 54xx Instructions and Programming 6 hours

Detail Study of TMS320C54X & 54xx Instructions and Programming, On-Chip peripherals, Interrupts of TMS32OC54XX Processors, Pipeline Operation of TMS32OC54xx Processor.

Part B
Unit-5 Implementation of Basic DSP Algorithms 6 hours

Introduction, The Q-notation, FIR Filters, IIR Filters, Interpolation and Decimation Filters (one example in each case).

Unit-6 Implementation of FFT Algorithms 6 hours

Introduction, An FFT Algorithm for DFT Computation, Overflow and Scaling, Bit-Reversed Index Generation & Implementation on the TMS32OC54xx.

Unit-7 Interfacing Memory and Parallel I/O Peripherals to DSP Devices 8 hours

Introduction, Memory Space Organization, External Bus Interfacing Signals. Memory Interface, Parallel I/O Interface, Programmed I/O, Interrupts and I / O Direct Memory Access (DMA).

Unit-8 Interfacing And Applications of DSP Processor 6 hours

Introduction, Synchronous Serial Interface, A CODEC Interface Circuit. DSP Based Bio-telemetry Receiver, A Speech Processing System, An Image Processing System.

Last Updated: Tuesday, January 24, 2023