10EC661 Analog and Mixed Mode VLSI Design syllabus for EC


Part A
Unit-1 Data converter fundamentals 7 hours

Analog versus Digital Discrete Time Signals, Converting Analog Signals to Data Signals, Sample and Hold Characteristics, DAC Specifications, ADC Specifications, Mixed-Signal Layout Issues.

Unit-2 Data Converters Architectures 12 hours

DAC Architectures, Digital Input Code, Resistors String, R-2R Ladder Networks, Current Steering, Charge Scaling DACs, Cyclic DAC, Pipeline DAC, ADC Architectures, Flash, 2-Step Flash ADC, Pipeline ADC, Integrating ADC, Successive Approximation ADC.

Unit-3 Non-Linear Analog Circuits 7 hours

Basic CMOS Comparator Design (Excluding Characterization), Analog Multipliers, Multiplying Quad (Excluding Stimulation), Level Shifting (Excluding Input Level Shifting For Multiplier).

Unit-4 Data Converter SNR 8 hours

Improving SNR Using Averaging (Excluding Jitter & Averaging onwards), Decimating Filters for ADCs (Excluding Decimating without Averaging onwards), Interpolating Filters for DAC, Band pass and High pass Sync filters.

Part B
Unit-5 Su-Microns CMOS circuit design 10 hours

Process Flow, Capacitors and Resistors, MOSFET Switch (upto Bidirectional Switches), Delay and adder Elements, Analog Circuits MOSFET Biasing (upto MOSFET Transition Frequency).

Unit-6 OPAmp Design 8 hours

OPAmp Design (Excluding Circuits Noise onwards)

Last Updated: Tuesday, January 24, 2023