8086 PROCESSOR: Historical background (refer Reference Book 1), 8086 CPU Architecture (1.1 – 1.3 of Text). Addressing modes, Machine language instruction formats, Machine coding the program (2.2, 2.1, 3.2 of Text).INSTRUCTION SET OF 8086: Data transfer and arithmetic instructions. Control/Branch Instructions, Illustration of these instructions with example programs (2.3 of Text).
Logical Instructions, String manipulation instructions, Flag manipulation and Processor control instructions, Illustration of these instructions with example programs. Assembler Directives and Operators, Assembly Language Programming and example programs (2.3, 2.4, 3.4 of Text).
Stack and Interrupts:Introduction to stack, Stack structure of 8086, Programming for Stack. Interrupts and Interrupt Service routines, Interrupt cycle of 8086, NMI, INTR, Interrupt programming, Passing parameters to procedures, Macros, Timing and Delays. (Chap.4 of Text).
8086 Bus Configuration and Timings:Physical memory Organization, General Bus operation cycle, I/O addressing capability, Special processor activities, Minimum mode 8086 system and Timing diagrams, Maximum Mode 8086 system and Timing diagrams. (1.4 to 1.9 of Text).Basic Peripherals and their Interfacing with 8086 (Part 1):Static RAM Interfacing with 8086 (5.1.1), Interfacing I/O ports, PIO 8255, Modes of operation – Mode-0 and BSR Mode, Interfacing Keyboard and 7-Segment digits using 8255 (Refer 5.3, 5.4, 5.5 of Text).
Basic Peripherals and their Interfacing with 8086 (Part 2): Interfacing ADC-0808/0809, DAC-0800, Stepper Motor using 8255 (5.6.1, 5.7.2, 5.8). Timer 8254 – Mode 0, 1, 2 & 3 and Interfacing programmes for these modes (refer 6.1 of Text).INT 21H DOS Function calls - for handling Keyboard and Display (refer Appendix-B of Text).Other Architectures: Architecture of 8088 (refer 1.10 upto 1.10.1 of Text) and Architecture of NDP 8087 (refer 8.3.1, 8.3.5 of Text). Von-Neumann & Harvard CPU architecture and CISC & RISCCPU architecture (refer Reference Book 1).