15EC663 Digital System Design using Verilog syllabus for EC



A d v e r t i s e m e n t

Module-1 Introduction and Methodology 8 hours

Introduction and Methodology: Digital Systems and Embedded Systems, Real-World Circuits, Models, Design Methodology (1.1, 1.3 to 1.5 of Text). Combinational Basics: Combinational Components and Circuits, Verification of Combinational Circuits.(2.3 and 2.4 of Text) Sequential Basics: Sequential Datapaths and Control Clocked Synchronous Timing Methodology (4.3 up to 4.3.1,4.4 up to 4.4.1 of Text).

Module-2 Memories 8 hours

Memories: Concepts, Memory Types, Error Detection and Correction (Chap 5 of Text).

Module-3 Implementation Fabrics: 8 hours

Implementation Fabrics: Integrated Circuits, Programmable Logic Devices, Packaging and Circuit boards, Interconnection and Signal integrity (Chap 6 of Text).

Module-4 I/O interfacing 8 hours

I/O interfacing: I/O devices, I/O controllers, Parallel Buses, Serial Transmission, I/O software (Chap 8 of Text).

Module-5 Design Methodology 8 hours

Design Methodology: Design flow, Design optimization, Design for test, Nontechnical Issues (Chap 10 of Text).

Last Updated: Tuesday, January 24, 2023