18EC644 Digital System Design using Verilog syllabus for EC

Introduction and Methodology:

Digital Systems and Embedded Systems, Real-World Circuits, Models, Design Methodology (1.1, 1.3to 1.5of Text).

Combinational Basics:

Combinational Components and Circuits, Verification of Combinational Circuits (2.3 and 2.4 of Text).

Number Basics:

Unsigned integers, Signed Integers, Fixed point Numbers, Floating point Numbers (3.1.1, 3.2.1, 3.3.1 and 3.4).

Sequential Basics:

Sequential Datapaths and Control Clocked Synchronous Timing Methodology (4.3 up to 4.3.1, 4.4 up to 4.4.1 of Text).

Memories:

Concepts, Memory 'JYpes, Error Detection and Correction (Chap 5 of Text).

Implementation Fabrics:

Integrated Circuits, Programmable Logic Devices, Packaging and Circuit boards, Interconnection and Signal integrity (Chap 6 of Text).

1/0 interfacing:

1/O devices, 1/O controllers, Parallel Buses, Serial Transmission, 1/O software (Chap 8 of Text).

Design Methodology:

Design flow, Design optimization, Design for test, Nontechnical Issues (Chap 10 of Text).

Course outcomes:

After studying this course, students will be able to:

1. Construct the combinational circuits, using discrete gates and programmable logic devices.

2 Describe how arithmetic operations can be performed for each kind of code, and also combinational circuits that implement arithmetic operations.

3. Design a semiconductor memory for specific chip design.

4. Design embedded systems using small microcontrollers, larger CPUs/ DSPs, or hard or soft processor cores.

5. Synthesize different types of l/O controllers that are used in embedded system.

Question paper pattern:

• Examination will be conducted for 100 marks with question paper containing 10 full questions, each of 20 marks.
• Each full question can have a maximum of 4 sub questions.
• There will be 2 full questions from each module covering all the topics of the module.
• Students will have to answer 5 full questions, selecting one full question from each module.
• The total marks will be proportionally reduced to 60 marks as SEE marks is 60

TextBook:

• Peter J. Ashenden, "Digital Design: An Embedded Systems Approach Using VERILOG", Elesvier, 2010.

Reference Books:

1. Ming-Bo Lin, ''Digital System Designs and Practices: Using Verilog HDL and FPGAs", Wiley, 2008

2. Charles Roth, Lizy K. John, Byeong Kil Lee, "Digital Systems Design Using Verilog", Cengage, 1st Edition.

3. Donald E. Thomas, Philip R Moorby, 'TheVerilog Hardware Description Language", Springer, Fifth edition.

4. Michael D. Ciletti, "Advanced Digital Design with the Verilog HDL" Pearson (Prentice Hall), Second edition.