21ECL35 Analog and Digital Electronics Lab syllabus for EC

Experiments

1 Design and set up the BJT common emitter voltage amplifier with and without feedback and determine the gain- bandwidth product, input and output impedances.

2 Design and set-up BJT/FET

i) Colpitts Oscillator,

ii) Crystal Oscillator and

iii) RC Phase shift oscillator

3 Design and set up the circuits using opamp:

i) Adder,

ii) Integrator,

iii) Differentiator and

iv) Comparator

4 Obtain the static characteristics of SCR and test SCR Controlled HWR and FWR using RC triggering circuit.

5 Design and implement

(a) Half Adder & Full Adder using basic gates and NAND gates,

(b) Half subtractor & Full subtractor using NAND gates,

(c) 4-variable function using IC74151(8:1MUX).

6 Realize

(i) Binary to Gray code conversion & vice-versa (IC74139),

(ii) BCD to Excess-3 code conversion and vice versa

7 a) Realize using NAND Gates:

i) Master-Slave JK Flip-Flop, ii) D Flip-Flop and iii) T Flip-Flop

b) Realize the shift registers using IC7474/7495:

(i) SISO (ii) SIPO (iii) PISO (iv) PIPO (v) Ring counter and (vi) Johnson counter.

8 Realize a) Design Mod – N Synchronous Up Counter & Down Counter using 7476 JK Flip-flop

b) Mod-N Counter using IC7490 / 7476

c) Synchronous counter using IC74192

9 Design 4-bit R – 2R Op-Amp Digital to Analog Converter

(i) for a 4-bit binary input using toggle switches

(ii) by generating digital inputs using mod-16

10 Pseudorandom sequence generator using IC7495

11 Test the precision rectifiers using opamp: i) Half wave rectifier ii) Full wave rectifier

12 Design and test Monostable and Astable Multivibrator using 555 Timer

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:

1. Design and analyze the BJT/FET amplifier and oscillator circuits.

2. Design and test Opamp circuits to realize the mathematical computations, DAC and precision rectifiers.

3. Design and test the combinational logic circuits for the given specifications.

4. Test the sequential logic circuits for the given functionality.

5. Demonstrate the basic electronic circuit experiments using SCR and 555 timer.

Assessment Details (both CIE and SEE)

• The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
• The minimum passing mark for the CIE is 40% of the maximum marks (20 marks).
• A student shall be deemed to have satisfied the academic requirements and earned the credits allotted to each course. The student has to secure not less than 35% (18 Marks out of 50) in the semester-end examination (SEE).

Continuous Internal Evaluation (CIE):

CIE marks for the practical course is 50 Marks.

The split-up of CIE marks for record/ journal and test are in the ratio 60:40.

• Each experiment to be evaluated for conduction with observation sheet and record write-up. Rubrics for the evaluation of the journal/write-up for hardware/software experiments designed by the faculty who is handling the laboratory session and is made known to students at the beginning of the practical session.
• Record should contain all the specified experiments in the syllabus and each experiment write-up will be evaluated for 10 marks.
• Total marks scored by the students are scaled downed to 30 marks (60% of maximum marks).
• Weightage to be given for neatness and submission of record/write-up on time.
• Department shall conduct 02 tests for 100 marks, the first test shall be conducted after the 8th week of the semester and the second test shall be conducted after the 14th week of the semester.
• In each test, test write-up, conduction of experiment, acceptable result, and procedural knowledge will carry a weightage of 60% and the rest 40% for viva-voce.
• The suitable rubrics can be designed to evaluate each student’s performance and learning ability. Rubrics suggested in Annexure-II of Regulation book
• The average of 02 tests is scaled down to 20 marks (40% of the maximum marks).

The Sum of scaled-down marks scored in the report write-up/journal and average marks of two tests is the total CIE marks scored by the student.

Semester End Evaluation (SEE):

SEE marks for the practical course is 50 Marks. SEE shall be conducted jointly by the two examiners of the same institute, examiners are appointed by the University

• All laboratory experiments are to be included for practical examination (Rubrics) Breakup of marks and the instructions printed on the cover page of the answer script to be strictly adhered to by the examiners. OR based on the course requirement evaluation rubrics shall be decided jointly by examiners.
• Students can pick one question (experiment) from the questions lot prepared by the internal /external examiners jointly.
• Evaluation of test write-up/ conduction procedure and result/viva will be conducted jointly by examiners.
• General rubrics suggested for SEE are mentioned here, writeup-20%, Conduction procedure and result in -60%, Viva-voce 20% of maximum marks. SEE for practical shall be evaluated for 100 marks and scored marks shall be scaled down to 50 marks (however, based on course type, rubrics shall be decided by the examiners) Change of experiment is allowed only once and 15% Marks allotted to the procedure part to be made zero.
• The duration of SEE is 03 hours Rubrics suggested in Annexure-II of Regulation book

Suggested Learning Resources:

1. Fundamentals of Electronic Devices and Circuits Lab Manual, David A Bell, 5th Edition, 2009, Oxford University Press.

2. Op-Amps and Linear Integrated Circuits, Ramakant A Gayakwad, 4th Edition, Pearson Education, 2018. ISBN: 978-93-325-4991-3.

3. Fundamentals of Logic Design, Charles H Roth Jr., Larry L Kinney, Cengage Learning, 7th Edition.