VHDL description of combinational networks, Modeling flip-flops using VHDL,VHDL models for a multiplexer, Compilation and simulation of VHDL code, Modeling a sequential machine, Variables, Signals and constants, Arrays, VHDL operators, VHDL functions, VHDL procedures,Packages and libraries, VHDL model for a counter.
Read-only memories, Programmable logic arrays (PLAs), Programmable array logic (PALs), Other sequential programmable logic devices(PLDs), Design of a keypad scanner.
Design of a serial adder with accumulator, State graphs for control networks, Design of a binary multiplier, Multiplication of signed binary numbers, Design of a binary divider.
State machine charts, Derivation of SM charts, Realization of SM charts. Implementation of the dice game, Alternative realization for SM charts using microprogramming, Linked state machines.
Xilinx 3000 series FPGAs, Designing with FPGAs, Xilinx 4000 series FPGAs, using a one-hot state assignment, Altera complex programmable logic devices (CPLDs), Altera FELX 10K series COLDs.
Representation of floating-point numbers, Floating-point multiplication, Other floating-point operations.
Attributes, Transport and Inertial delays, Operator overloading,Multivalued logic and signal resolution, IEEE-1164 standard logic, Generics, Generate statements,Synthesis of VHDL code, Synthesis examples, Files and TEXTIO.
Static RAM, A simplified 486 bus model,interfacing memory to a microprocessor bus.