Principles of combinational logic: Review of Boolean Algebra.Definition of combinational, Canonical forms, Generation of switching equations from truthtables, Karnaugh maps-3, 4 and 5 variables. Incompletely specified functions (Don’t careterms). Simplifying max - term equations. Quine -McClusky minimization technique,Quine - McClusky using don’t care terms, Reduced Prime Implicant tables, Map enteredvariables.
Analysis and design of Combinational Logic: General approach, Decoders-BCDdecoders, Encoders. Digital multiplexers-using multiplexers as Boolean function generators.Adders and Subtractors-Cascading full adders, Look ahead carry, Binary comparators.Design methods of building blocks of combinational logics.
Sequential Circuits: Basic Bistable element, Latches, SR latch, Application of SR latch, ASwitch debouncer. The SR latch, The gated SR latch. The gated D Latch, The Master-SlaveFlip-Flops (Pulse-Triggered Flip-Flops): The master-slave SR Flip-Flops, The master-slaveJK Flip-Flop, Edge Triggered Flip-flop: The Positive Edge-Triggered D Flip-Flop,Negative-Edge Triggered D Flip-Flop. Characteristic equations, Registers, Counters-BinaryRipple Counter, Synchronous Binary counters, Counters based on Shift Registers, Design ofa Synchronous counters, Design of a Synchronous Mod-N counters using clocked JK Flip-Flops Design of a Synchronous Mod-N counter using clocked D, T, or SR Flip-Flops.
Sequential Design: Introduction, Mealy and Moore models, State machine notation,synchronous sequential circuit analysis and design. Construction of state Diagrams,Counters Design.
HDL: Introduction, A brief history of HDL, Structure of HDL Module, Operators, Datatypes, Types of Descriptions, Simulation and synthesis, Brief comparison of VHDL andVerilog.Data-Flow Descriptions: Highlights of Data flow descriptions, Structure of data-flowdescription, Data type-vectors.