21EE32 Analog Electronic Circuits and Op-Amps syllabus for EE

Diode Circuits:

Diode characteristics, Diode clipping, and clamping circuits.

Transistor at Low Frequencies:

Operating point, voltage divider bias circuit, stability factor, BJT transistor modelling- emitter follower, analysis using h – parameter model.

Multistage Amplifiers:

Transistor Amplifiers, Cascade and cascode connections, Darlington circuits, analysis and design.

Feedback Amplifiers:

Feedback concept, different types, practical feedback circuits, analysis and design of feedback circuits.

Power Amplifiers:

Classification, analysis and design of Class A – Directly Coupled and Transformer Coupled, Class B- Complementry Symmetry and Push Pull, Class C and Class AB.

FETs:

Construction, working and characteristics of JFETs and MOSFETs.

Op-Amp Applications:

A.C. amplifier, summing, scaling & averaging amplifier, inverting and non-inverting configuration, Instrumentation amplifier.

Active Filters:

First & Second order high pass & low pass Butterworth filters. Band pass filters, all pass filters.

DC Voltage Regulators:

Voltage regulator basics, voltage follower regulator, adjustable output regulator, LM317 & LM337 Integrated circuits regulators.

OP –Amp Signal Generators:

Integrator and Differentiator circuits, Triangular / rectangular wave generator, phase shift oscillator, saw tooth generator.

OP –Amp Comparators and Converters:

Basic comparator, zero crossing detector, inverting & non-inverting Schmitt trigger circuit, voltage to current converter with grounded load, current to voltage converter and basics of voltage to frequency and frequency to voltage converters.

Experiments

1 Experiments on clippers and clampers.

2 Static Transistor characteristics for CE, CB and CC modes and determination of h parameters.

3 Frequency response of single stage BJT and FET RC coupled amplifier and determination of half - power points, bandwidth, input and output impedances.

4 Design and testing of BJT -RC phase shift oscillator for given frequency of oscillation.

5 Determination of gain, input and output impedance of BJT Darlington emitter follower with and without bootstrapping.

6 Design and verify a precision full wave rectifier. Determine the performance parameters.

7 Design and realize to analyse the frequency response of an op – amp amplifier under inverting and non - inverting configuration for a given gain.

8 Design and verify the output waveform of an op – amp RC phase shift oscillator for a desired frequency.

9 Design and realize Schmitt trigger circuit using an op – amp for desired upper trip point (UTP) and lower trip point (LTP).

10 Verify the operation of an op – amp as (a) voltage comparator circuit and (b) zero crossing detector.

11 Design and verify the operation of op – amp as an (a) adder (b) subtractor (c) integrator and (d) differentiator.

12 Design and realize an op – amp based first order Butterworth (a) low pass (b) high pass and (c) band pass filters for a given cut off frequency/frequencies to verify the frequency response characteristic.

Course outcomes (Course Skill Set):

At the end of the course the student will be able to:

• Obtain the output characteristics of clipper and clamper circuits.
• Design and compare biasing circuits for transistor amplifiers & explain the transistor switching.
• Explain the concept of feedback, its types and design of feedback circuits
• Design and analyse the power amplifier circuits and oscillators for different frequencies.
• Design and analysis of FET and MOSFET amplifiers.
• Demonstrate the application of Op-amps.

Assessment Details (both CIE and SEE)

• The weightage of Continuous Internal Evaluation (CIE) is 50% and for Semester End Exam (SEE) is 50%.
• The minimum passing mark for the CIE is 40% of the maximum marks (20 marks).
• A student shall be deemed to have satisfied the academic requirements and earned the credits allotted to each subject/ course if the student secures not less than 35% (18 Marks out of 50)in the semester-end examination(SEE), and a minimum of 40% (40 marks out of 100) in the sum total of the CIE (Continuous Internal Evaluation) and SEE (Semester End Examination) taken together

CIE for the theory component of IPCC

Two Tests each of 20 Marks (duration 01 hour)

• First test at the end of 5th week of the semester
• Second test at the end of the 10th week of the semester

Two assignments each of 10 Marks

• First assignment at the end of 4th week of the semester
• Second assignment at the end of 9th week of the semester Scaled-down marks of two tests and two assignments added will be CIE marks for the theory component of IPCC for 30 marks.

CIE for the practical component of IPCC

• On completion of every experiment/program in the laboratory, the students shall be evaluated and marks shall be awarded on the same day. The15 marks are for conducting the experiment and preparation of the laboratory record, the other 05 marks shall be for the test conducted at the end of the semester.
• The CIE marks awarded in the case of the Practical component shall be based on the continuous evaluation of the laboratory report. Each experiment report can be evaluated for 10 marks. Marks of all experiments’ write-ups are added and scaled down to 15 marks.
• The laboratory test (duration 03 hours) at the end of the 15th week of the semester /after completion of all the experiments (whichever is early) shall be conducted for 50 marks and scaled down to 05 marks. Scaled-down marks of write-up evaluations and tests added will be CIE marks for the laboratory component of IPCC for 20 marks.

SEE for IPCC

Theory SEE will be conducted by University as per the scheduled timetable, with common question papers for the course (duration 03 hours)

• The question paper will have ten questions. Each question is set for 20 marks.
• There will be 2 questions from each module. Each of the two questions under a module (with a maximum of 3 sub-questions), should have a mix of topics under that module.
• The students have to answer 5 full questions, selecting one full question from each module.

The theory portion of the IPCC shall be for both CIE and SEE, whereas the practical portion will have a CIE component only. Questions mentioned in the SEE paper shall include questions from the practical component).

• The minimum marks to be secured in CIE to appear for SEE shall be the 12 (40% of maximum marks30) in the theory component and 08 (40% of maximum marks -20) in the practical component. The laboratory component of the IPCC shall be for CIE only. However, in SEE, the questions from the laboratory component shall be included. The maximum of 04/05 questions to be set from the practical component of IPCC, the total marks of all questions should not be more than the 20 marks.
• SEE will be conducted for 100 marks and students shall secure 35% of the maximum marks to qualify in the SEE. Marks secured will be scaled down to 50.

Suggested Learning Resources:

(1)Electronic Devices and Circuit Theory, Robert L Boylestad Louis Nashelsky, Pearson,11th Edition, 2015.

(2) Electronic Devices and Circuits, David A Bell, Oxford University Press,5th Edition, 2008.

(3) Op-Amps and Linear Integrated Circuits, Ramakant A Gayakwad, Pearson, 4thEdition 2015.

(4) Operational Amplifiers and Linear ICs, David A. Bell, Oxford, 3rd Edition 2011.