15CS32 Analog and Digital Electronics syllabus for IS

Field Effect Transistors:
Junction Field Effect Transistors, MOSFETs, Differencesbetween JFETs and MOSFETs, Biasing MOSFETs, FET Applications, CMOS Devices.
Wave-Shaping Circuits:
Integrated Circuit(IC) Multivibrators.
Introduction to Operational Amplifier:
Ideal v/s practical Opamp, Performance Parameters,
OperationalAmplifier Application Circuits:
Peak Detector Circuit, Comparator, Active Filters, Non-Linear Amplifier, Relaxation Oscillator, Current-To-Voltage Converter, Voltage-To-Current Converter.
Text book 1:- Ch 5: 5.2, 5.3, 5.5, 5.8, 5.9, 5.1.Ch13: 13.10.Ch 16: 16.3, 16.4. Ch 17:7.12, 17.14, 17.15, 17.18, 17.19, 17.20, 17.21.

The Basic Gates:
Review of Basic Logic gates, Positive and Negative Logic, Introductionto HDL. Combinational
Logic Circuits:
Sum-of-Products Method, Truth Table toKarnaugh Map, Pairs Quads, and Octets, Karnaugh Simplifications, Don’t-care Conditions,Product-of-sums Method, Product-of-sums simplifications, Simplification by Quine-McClusky Method, Hazards and Hazard covers, HDL Implementation Models.
Text book 2:- Ch 2: 2.4, 2.5. Ch3: 3.2 to 3.11.

Data-Processing Circuits:
Multiplexers, Demultiplexers, 1-of-16 Decoder, BCD toDecimal Decoders, Seven Segment Decoders, Encoders, Exclusive-OR Gates, ParityGenerators and Checkers, Magnitude Comparator, Programmable Array Logic,Programmable Logic Arrays, HDL Implementation of Data Processing Circuits. ArithmeticBuilding Blocks, Arithmetic Logic Unit Flip- Flops:
RS Flip-Flops, Gated Flip-Flops,Edge-triggered RS FLIP-FLOP, Edge-triggered D FLIP-FLOPs, Edge-triggered JK FLIPFLOPs.Text book 2:- Ch 4:- 4.1 to 4.9, 4.11, 4.12, 4.14.Ch 6:-6.7, 6.10.Ch 8:- 8.1 to 8.5.

Flip- Flops:
FLIP-FLOP Timing, JK Master-slave FLIP-FLOP, Switch Contact BounceCircuits, Various Representation of FLIP-FLOPs, HDL Implementation of FLIP-FLOP.
Registers:
Types of Registers, Serial In - Serial Out, Serial In - Parallel out, Parallel In -Serial Out, Parallel In - Parallel Out, Universal Shift Register, Applications of ShiftRegisters, Register implementation in HDL.
Counters:
Asynchronous Counters, DecodingGates, Synchronous Counters, Changing the Counter Modulus.
(Text book 2:- Ch 8: 8.6, 8.8, 8.9, 8.10, 8.13. Ch 9: 9.1 to 9.8. Ch 10: 10.1 to 10.4

Counters:
Decade Counters, Presettable Counters, Counter Design as a Synthesis problem,A Digital Clock, Counter Design using HDL.
D/A Conversion and A/D Conversion:
Variable, Resistor Networks, Binary Ladders, D/A Converters, D/A Accuracy andResolution, A/D Converter-Simultaneous Conversion, A/D Converter-Counter Method,Continuous A/D Conversion, A/D Techniques, Dual-slope A/D Conversion, A/D Accuracyand Resolution.
Text book 2:- Ch 10: 10.5 to 10.9. Ch 12: 12.1 to 12.10.