18EC35 Computer Organization & Architecture syllabus for TE



A d v e r t i s e m e n t

Module-1 Basic Structure of Computers 8 hours

Basic Structure of Computers:

Computer Types, Functional Units, Basic Operational Concepts, Bus Structures, Software, Performance – Processor Clock, Basic Performance Equation (upto 1.6.2 of Chap 1 of Text).

 

Machine Instructions and Programs:

Numbers, Arithmetic Operations and Characters, IEEE standard for Floating point Numbers, Memory Location and Addresses, Memory Operations, Instructions and Instruction Sequencing (upto 2.4.6 of Chap 2 and 6.7.1 of Chap 6 of Text).

Module-2 Addressing Modes 8 hours

Addressing Modes,

Assembly Language, Basic Input and Output Operations, Stacks and Queues, Subroutines, Additional Instructions (from 2.4.7 of Chap 2, except 2.9.3, 2.11 & 2.12 of Text).

Module-3 Input/Output Organization 8 hours

Input/Output Organization:

Accessing I/O Devices, Interrupts – Interrupt Hardware, Enabling and Disabling Interrupts, Handling Multiple Devices, Controlling Device Requests, Direct Memory Access(upto 4.2.4 and 4.4 except 4.4.1 of Chap 4 of Text).

Module-4 Memory System 8 hours

Memory System:

Basic Concepts, Semiconductor RAM Memories-Internal organization of memory chips, Static memories, Asynchronous DRAMS, Read Only Memories, Cash Memories, Virtual Memories, Secondary Storage-Magnetic Hard Disks (5.1, 5.2, 5.2.1, 5.2.2, 5.2.3, 5.3, 5.5 (except 5.5.1 to 5.5.4), 5.7 (except 5.7.1), 5.9, 5.9.1 of Chap 5 of Text).

Module-5 Basic Processing Unit 8 hours

Basic Processing Unit:

Some Fundamental Concepts, Execution of a Complete Instruction, Multiple Bus Organization, Hardwired Control, Microprogrammed Control (upto 7.5 except 7.5.1 to 7.5.6 of Chap 7 of Text).

 

Course Outcomes:

After studying this course, students will be able to:

• Explain the basic organization of a computer system.

• Explain different ways of accessing an input / output device including interrupts.

• Illustrate the organization of different types of semiconductor and other secondary storage memories.

• Illustrate simple processor organization based on hardwired control and micro programmed control.

 

Question paper pattern:

• Examination will be conducted for 100 marks with question paper containing 10 full questions, each of 20 marks.

• Each full question can have a maximum of 4 sub questions.

• There will be 2 full questions from each module covering all the topics of the module.

• Students will have to answer 5 full questions, selecting one full question from each module

• The total marks will be proportionally reduced to 60 marks as SEE marks is 60.

 

Text Book:

1. Carl Hamacher, ZvonkoVranesic, SafwatZaky: Computer Organization, 5th Edition, Tata McGraw Hill, 2002.

 

Reference Books:

1. David A. Patterson, John L. Hennessy: Computer Organization and Design – The Hardware / Software Interface ARM Edition, 4th Edition, Elsevier, 2009.

2. William Stallings: Computer Organization & Architecture, 7th Edition, PHI, 2006.

3. Vincent P. Heuring& Harry F. Jordan: Computer Systems Design and Architecture, 2nd Edition, Pearson Education, 2004.

Last Updated: Tuesday, January 24, 2023